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[Communication-Mobile] DDFS_PLL_10DA_with51

Description: FPGA下的DDS程序的编写,VHDL语言,-FPGA under DDS preparation procedures, VHDL language,
Platform: | Size: 627712 | Author: huang | Hits:

[File Format] jiyufpgadds

Description: 直接数字频率合成（Direct Digital Fraquency Synthesis,即DDFS，一般简称DDS）是从相位概念出发直接合成所需要波形的一种新的频率合成技术。-Direct Digital Synthesis (Direct Digital Fraquency Synthesis, that is, DDFS, generally referred to as DDS) is a departure from the concept phase direct synthesis of waveforms needed for a new frequency synthesis.
Platform: | Size: 101376 | Author: 王永 | Hits:

[Software Engineering] dds_an_quicklogic

Description: 该文档是QUICKLOGIC的一篇关于用FPGA实现DDS的设计指导。-The document is an article on using the QuickLogic FPGA design guidance to achieve DDS.
Platform: | Size: 46080 | Author: cobain | Hits:

[VHDL-FPGA-Verilog] Wave_ROM

Description: 基于RAm的FPGA实现DDS,有测试文件-Ram realize the FPGA-based DDS, have the test paper
Platform: | Size: 5120 | Author: xsj | Hits:

[VHDL-FPGA-Verilog] dds_good

Description: 采用DDS技术的波形发生器，FPGA实现。-The use of DDS technology waveform generator, FPGA realization.
Platform: | Size: 510976 | Author: | Hits:

[Communication-Mobile] 13898375FPGA_FIR

Description: 尽管频率合成技术已经经历了大半个世纪的发展史，但直到今天，人们对 它的研究仍然在继续。现在，我们可以开发出输出频率高达IG的DDS系统， 武汉理工大学硕士学位论文 已能满足绝大多数频率源的要求，集成DDS产品的信噪比也可达到75dB以上， 已达到锁相频率合成的一般水平。电子技术的发展己进入数字时代，模拟信号 数字化的方法也是目前一个热门研究课题，高速AD、DA器件在通信、广播电 视等领域的应用越来越广泛。本次设计完成了软件仿真和硬件实现，对设计原 理和设计结果进行了一定的理论分析，在一定的频率范围内设计结果与理论值 基本符号，达到了设计指标的要求。限于本人的水平和实现条件，此次设计在 频率稳定度、最高输出频率、降低杂散等方面仍有改进的空间，今后还需进一 步提高。
Platform: | Size: 152576 | Author: 包真 | Hits:

[VHDL-FPGA-Verilog] dds_using_FPGA

Description: verilog编写基于fpga的DDS实现-Verilog prepared based on the FPGA to achieve the DDS
Platform: | Size: 448512 | Author: 宇天 | Hits:

[VHDL-FPGA-Verilog] dds

Description: 利用fpga实现的DDS，可输出正弦波，输出频率可调-FPGA realization of the use of DDS, sine wave output, output frequency adjustable
Platform: | Size: 468992 | Author: qlg | Hits:

[Wavelet] DDS

Description: 利用EDA技术和FPGA在UP3开发板上实现直接数字频率综合器的设计。 实验中加入了相位控制字PWORD，用以控制相位偏移量的前四位，将相位偏移量加到ROM地址总线 上，从而引起从ROM中取得的正弦信号的偏移，实现移相信号发生器的移相功能。 实验中还加入了LCD显示功能，通过LCD显示模块器件，用LCD显示正弦信号的频率，所显示的频 率也是由频率字控制的。LCD的驱动原理同上次实验。-The use of EDA technology and FPGA development in the UP3 board direct digital frequency synthesizer design. Experiment by adding a phase control word PWORD, to control the phase offset of the top four will be added to the phase offset ROM address bus, thereby causing ROM obtained from the sinusoidal signal offset, shifted believe realize its phase-shifting function generator. Experiments have also joined the LCD display, LCD display module through the device, with LCD display the frequency of sinusoidal signal, as shown by the frequency of word frequency control. LCD driving principles with the previous experiment.
Platform: | Size: 1225728 | Author: Emma | Hits:

[SCM] DDS_chinese

Description: dds中文资料，从原理入手，交你如何去设计dds。-dds Chinese information, starting from the principle of paying you how to design dds.
Platform: | Size: 454656 | Author: cheng | Hits:

[SCM] dds-fw

Description: 使用MSP430控制AD9854产生任意信号-MSP430 to control the use of arbitrary signals generated AD9854
Platform: | Size: 394240 | Author: 徐龙 | Hits:

[VHDL-FPGA-Verilog] FPGAreleaseDDS

Description: FPGA实现 DDS_讲的非常详细,师兄的一片论文-FPGA realize DDS_ talked about in great detail, of a senior thesis
Platform: | Size: 60416 | Author: ticklay | Hits:

[Other] 66666

Description: 用FPGA 来设计的dds的信号发生器的全部内容都在里面，-Using FPGA to design the signal generator dds all the content inside,
Platform: | Size: 3208192 | Author: 杨东 | Hits:

[VHDL-FPGA-Verilog] DDS

Description: DDS的频率转换可以以近似认为是即时的，这是因为它的相位序列在时间上是离散的，在频率控制字改变之后，要经过一个时钟周期之后才能按照新的相位增量增加，所以也可以说它的频率转换时间就是频率控制字的传输时间，-DDS frequency conversion can be considered similar to real-time, this is because it is the phase sequence in time is discrete, in the frequency control word change after one clock cycle to go through before a new phase in accordance with the incremental increase, so it can be said of the frequency switching time is the frequency control word transmission time,
Platform: | Size: 2096128 | Author: lqb | Hits:

[Software Engineering] dds

Description: 基于FPGA的双路可移相任意波形发生器 Altera中国大学生电子设计文章竞赛获奖作品刊登-FPGA-based dual phase shifter can be arbitrary waveform generator Altera China Undergraduate Electronic Design Contest winning entries published articles
Platform: | Size: 1695744 | Author: 姜兆刚 | Hits:

[VHDL-FPGA-Verilog] DDS

Description: DDS原理介绍，里面是有时序图和系统设计！-DDS principle that there is a timing diagram and system design!
Platform: | Size: 454656 | Author: dragon | Hits:

[Other] DDS

Description: 基于DDS技术的函数波形发生器设计，适合用fpga设计波形发生器用-Based on DDS technology function waveform generator design, suitable for FPGA design with Waveform Generator
Platform: | Size: 1682432 | Author: | Hits:

[VHDL-FPGA-Verilog] FPGA_signal_general

Description: 摘 要：介绍了直接数字频率合成 (DDS) 技术的基本原理，给出了基于Altera公司FPGA器件的一个三相正弦信号发生器的设计方案，同时给出了其软件程序和仿真结果。仿真结果表明：该方法生成的三相正弦信号具有对称性好、波形失真小、频率精度高等优点，且输出频率可调。 关键词：直接数字频率合成；现场可编程门阵列；FPGA；三相正弦信号-Abstract: Direct Digital Synthesis (DDS) technology, the basic principles are given Altera-based FPGA devices the company a three-phase sinusoidal signal generator design program, at the same time give its software programs and simulation results. The simulation results show that: the method to generate three-phase sinusoidal signal with good symmetry, waveform distortion small, the frequency of high precision, and adjustable output frequency. Key words: direct digital synthesizer field programmable gate array FPGA three-phase sinusoidal signal
Platform: | Size: 101376 | Author: 赵文 | Hits:

[Software Engineering] dds

Description: dds移相信号发生器 VHDL语言代码-dds
Platform: | Size: 384000 | Author: hanoi | Hits:

[VHDL-FPGA-Verilog] 32_hottest_forum_CPLD-FPGA

Description: 收集了目前关于FPGA设计的论坛，大家如果有什么疑问，可以到这些论坛上求助。-The collection of the current design of the forum on the FPGA, there is little doubt if the U.S. can go to for help on these forums.
Platform: | Size: 13312 | Author: 张芸 | Hits:
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